Record Beta
High Performance Embedded Architectures and Compilers
https://id.confref.org/data/confref-portal/event/hipeac2007
This record is part of the confref event International Conference on High-Performance Embedded Architectures and Compilers.
| rdf:type | portal:Conference |
|---|---|
| schema:location | Ghent (wd:Q1296) |
| rdfs:label | High Performance Embedded Architectures and Compilers |
| portal:acronym | HIPEAC |
| portal:area | https://id.confref.org/data/confref-portal/area/2 |
| portal:city | Ghent |
| portal:country | Belgium |
| portal:endDate | 2007-01-30 |
| portal:keyword | ASIP |
| portal:keyword | Extensible Processors |
| portal:keyword | Instruction Set Extension |
| portal:keyword | Intel IXP |
| portal:keyword | Pipestage Timing Constraint |
| portal:keyword | Task Creation and Mapping |
| portal:keyword | dataflow programming |
| portal:keyword | network processors |
| portal:keyword | throughput |
| portal:name | High Performance Embedded Architectures and Compilers |
| portal:portalPage | http://portal.confref.org/list/hipeac2007 |
| portal:series | https://id.confref.org/data/confref-portal/series/hipeac |
| portal:startDate | 2007-01-28 |
| portal:submissionExtended | false |
| portal:year | 2007 |
| cr:discipline | computer science (wd:Q21198) |
| cr:field | Computer and information sciences (https://id.confref.org/data/oecd-fos/1.2) |
| cr:sameAs | https://dblp.org/db/conf/hipeac/hipeac2007 |
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