# https://id.confref.org/data/confref-portal/event/vdat2017 (confref labs, beta)
@prefix cr: <https://id.confref.org/ontology/> .
@prefix portal: <https://id.confref.org/data/confref-portal/vocab/> .
@prefix rdfs: <http://www.w3.org/2000/01/rdf-schema#> .
@prefix schema: <http://schema.org/> .
@prefix wd: <http://www.wikidata.org/entity/> .
@prefix xsd: <http://www.w3.org/2001/XMLSchema#> .

<https://id.confref.org/data/confref-portal/event/vdat2017>
    a portal:Conference ;
    schema:location wd:Q1020718 ;
    rdfs:label "VLSI Design and Test" ;
    portal:acronym "VDAT" ;
    portal:area <https://id.confref.org/data/confref-portal/area/2> ;
    portal:city "Roorkee" ;
    portal:country "India" ;
    portal:endDate "2017-07-02"^^xsd:date ;
    portal:keyword "3D IC" ,
        "BCD" ,
        "CMOS" ,
        "CTAT" ,
        "DWT" ,
        "Energy efficiency" ,
        "Equivalence checking" ,
        "FPGA" ,
        "Field Programmable Gate Array (FPGA)" ,
        "FinFET" ,
        "Low power" ,
        "PTAT" ,
        "PVT compensation" ,
        "Reliability" ,
        "SRAM" ,
        "SoC" ,
        "TCAD" ,
        "automotive" ,
        "fault tolerance" ,
        "formal verification" ;
    portal:name "VLSI Design and Test" ;
    portal:portalPage <http://portal.confref.org/list/vdat2017> ;
    portal:series <https://id.confref.org/data/confref-portal/series/vdat> ;
    portal:startDate "2017-06-29"^^xsd:date ;
    portal:submissionExtended "false"^^xsd:boolean ;
    portal:year "2017"^^xsd:integer ;
    cr:discipline wd:Q21198 ;
    cr:field <https://id.confref.org/data/oecd-fos/1.2> ;
    cr:sameAs <https://dblp.org/db/conf/vdat/vdat2017> ,
        wd:Q106245328 .