Record Beta

International Symposium on VLSI Design and Test

https://id.confref.org/data/confref-portal/event/vdat2019a

rdf:type	portal:Conference
schema:location	Indore (wd:Q66616)
rdfs:label	International Symposium on VLSI Design and Test
portal:acronym	VDAT
portal:area	https://id.confref.org/data/confref-portal/area/2
portal:city	Indore
portal:country	India
portal:endDate	2019-07-06
portal:keyword	0.18 $$upmu $$ m CMOS
portal:keyword	AES
portal:keyword	Action-potential
portal:keyword	Activation function
portal:keyword	Adaptive filter
portal:keyword	Adder
portal:keyword	All-digital
portal:keyword	Ambipolarity
portal:keyword	Approximate computing
portal:keyword	Architecture
portal:keyword	CMOS
portal:keyword	Capacitor mismatch
portal:keyword	Droplet routing
portal:keyword	IoT
portal:keyword	Leakage power
portal:keyword	Low power
portal:keyword	Power Consumption
portal:keyword	SRAM
portal:keyword	Security
portal:keyword	lightweight
portal:name	International Symposium on VLSI Design and Test
portal:portalPage	http://portal.confref.org/list/vdat2019a
portal:series	https://id.confref.org/data/confref-portal/series/vdat
portal:startDate	2019-07-04
portal:submissionExtended	false
portal:year	2019
cr:discipline	computer science (wd:Q21198)
cr:field	Computer and information sciences (https://id.confref.org/data/oecd-fos/1.2)

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