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VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers

Name: VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers
Location: Tallinn

Date: 2016
Place: Tallinn, Estonia on the map
Series: IEEE/IFIP International Conference on Very Large Scale Integration of System-on-Chip (VLSI-SOC)
Edition: 24
Academic field: Natural sciences: Computer and information sciences
Identifier: https://id.confref.org/event/e11ybww

Proceedings

Title	DOI	Year	Record
VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers IFIP Advances in Information and Communication Technology 508	10.1007/978-3-319-67104-8	2017	dblp

Sources

The records of the sources that this identifier brings together (cr:sameAs).

dblp	`https://dblp.org/db/conf/vlsi/vlsisoc2016s`

Cite

VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers. confref identifier e11ybww. https://id.confref.org/event/e11ybww

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